介紹
Features
● 5 ns pin-to-pin logic delays
● System frequency up to 178 MHz
● 144 macrocells with 3,200 usable gat
● Available in small footprint packages
Optimized for high-performance 3.3V systems Advanced system features
● Fast concurrent programming
● Slew rate control on individual outputs
● Enhanced data security features
● Excellent quality and reliability
– Endurance exceeding 10,000 program/erase cycles
– 20 year data retention
– ESD protection exceeding 2,000V
● Pin-compatible with 5V-core XC95144 device in the 100-pin TQFP package